With the integrated circuit industry developing in accordance with the Moore Rule, feature dimension of CMOS devices continuously decreases, which poses various challenges to planar bulk-silicon CMOS devices. Various devices with new structures have been developed to conquer these challenges. Among these new structure devices, Fin Field Effect Transistors (FinFETs) have been considered to be one of the most promising candidates to replace the planar bulk-silicon CMOS devices. The FinFETs become a research focus all over the world.
Initially, the FinFET devices are mainly manufactured on SOI substrates, and their manufacturing process is simpler than that for bulk-silicon substrates. However, SOI FinFETs have drawbacks such as high manufacturing costs, inferior heat dissipation performance, floating-body effect, and bad compatibility with CMOS processes. In order to overcome the drawbacks of the SOI FinFETs, researches have been done on using bulk-silicon substrates in manufacturing the FinFET devices, which are called Bulk FinFETs. Products such as DRAM and SRAM based on the Bulk FinFETs have been put into use. However, typical Bulk FinFET devices have some drawbacks compared with SOI FinFET devices in that SCE suppressing effect is not ideal. Furthermore, leakage current is large due to leakage current paths in fins at channel bottom, and control of impurity profile is difficult.
In view of the foregoing problems, more work needs to be done to expedite the application of the FinFET devices. This is of great importance to the application of the FinFET devices and development of the semiconductor industry.